Energy Efficient Hardware-Software Co-Synthesis Using Reconfigurable Hardware Energy Efficient Hardware-Software Co-Synthesis Using Reconfigurable Hardware
Chapman & Hall/CRC Computer and Information Science Series

Energy Efficient Hardware-Software Co-Synthesis Using Reconfigurable Hardware

    • $99.99
    • $99.99

Publisher Description

Rapid energy estimation for energy efficient applications using field-programmable gate arrays (FPGAs) remains a challenging research topic. Energy dissipation and efficiency have prevented the widespread use of FPGA devices in embedded systems. Helping overcome these challenges, this book offers solutions for the development of energy efficient applications using FPGAs. It provides a framework for high-level hardware-software application development, describes energy performance modeling for reconfigurable system-on-chip devices, and explores energy efficient designs for various applications. The authors present a two-step rapid energy estimation technique that enables high-level design space exploration and offer a hardware-software design for energy efficient implementations of operating systems.

GENRE
Computers & Internet
RELEASED
2009
October 14
LANGUAGE
EN
English
LENGTH
224
Pages
PUBLISHER
CRC Press
SELLER
Taylor & Francis Group
SIZE
5.4
MB
Adversarial Reasoning Adversarial Reasoning
2006
Performance Analysis of Queuing and Computer Networks Performance Analysis of Queuing and Computer Networks
2008
Methods in Algorithmic Analysis Methods in Algorithmic Analysis
2016
Handbook of Parallel Computing Handbook of Parallel Computing
2007
Fundamentals of Natural Computing Fundamentals of Natural Computing
2006
Delaunay Mesh Generation Delaunay Mesh Generation
2016