Post-Silicon Validation and Debug

This book provides a comprehensive coverage of System-on-Chip (SoC) post-silicon validation and debug challenges and state-of-the-art solutions with contributions from SoC designers, academic researchers as well as SoC verification experts.  The readers will get a clear understanding of the existing debug infrastructure and how they can be effectively utilized to verify and debug SoCs. Provides a comprehensive overview of the SoC post-silicon validation and debug challenges;
Covers state-of-the-art techniques for developing on-chip debug infrastructure;
Describes automated techniques for generating post-silicon tests and assertions to enable effective post-silicon debug and coverage analysis;
Covers scalable post-silicon validation and bug localization using a combination of simulation-based techniques and formal methods;
Presents case studies for post-silicon debug of industrial SoC designs.